Hi Guys, I have a problem with $readmemb :( This is my code:
`timescale 1ns/100ps `include "rom_sin_vec.txt" module ROM_sin ( input clk, rst, input [10:0] addr, output reg [11:0] data ); reg [10:0] temp; integer i; reg [11:0] RAM_2048_12BIT [2047:0]; $readmemb ("rom_sin_vec.txt", RAM_2048_12BIT); always @ (posedge clk or negedge rst) begin if (!rst) data <= 12'b0; else if (clk) begin temp[10:0] = addr; data = RAM_2048_12BIT[temp]; end end endmodule And this is my txt file content 12'b000000000000 12'b000000000110 ... 12'b111111111001 And when I compile my project, I got this error: ** Error: rom_sin_vec.txt(1): near "12": syntax error, unexpected "INTEGER NUMBER", expecting "class" I'm using Modelsim-Altera Starter Edition, Version 6.5b Who can tell me why this error occurs and how to fix it :( thank you so much連結已複製
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You should not have `include "rom_sin_vec.txt" in your code. It does not get compiled as Verilog syntax and you do not put 12'b in front of each word. The $readmemb task will read the file as binary text.
