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hi every body
do u know how we can have vectors with different length in VHDL? the number of my vectors and their length depend on a parameter such as N. thank you.Link Copied
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quite easy:
signal my_sig : std_logic_vector(N-1 downto 0);- Mark as New
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no i mean i want to have N vectors that their length are different
i wanna write a loop for it LIKE: for i in 0 to N loop .....<= std_logic_vector(i downto 0); end loop; its ok!but what i should write instead of the blank?- Mark as New
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can you repost the code with a real example. Std_logic_vector is a type and you cannot index into it. You are also implying you want to assign an ever decreasing sized vector - you're not allowed to have an array of vectors with different sizes.
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--- Quote Start --- can you repost the code with a real example. Std_logic_vector is a type and you cannot index into it. You are also implying you want to assign an ever decreasing sized vector - you're not allowed to have an array of vectors with different sizes. --- Quote End --- thanks alot my friend i wanna translate haar algorithm to vhdl code plz see these pictures: http://i41.tinypic.com/35ksllh.jpg & http://i39.tinypic.com/2u6ftyx.png how i can do this? i though for writing this code i need to have a loop that makes different vectors.
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