PIO address space

[Altera_Forum]

Hello! 

 May be somebody knows, why SOPC Builder determins 0x0F address space for every PIO? Why does PIO need such size of address space?  Tnank you.

[Altera_Forum]

Hi Kira, 

 The PIO is always generated with two address bits. For I/O, the registers are 32-bit aligned. So you get 4 regs x 4 bytes or 0x10 of address space -- even when some of the registers are not implemented (e.g. write-only PIO).   Regards, --Scott