good evening to everybody
Sorry for my english , i'm italian
I'm a Plc-Pc programmer , and now i start this new adventure
with fpga .I order , and waiting too , a stratix2 dev. board.
In the meantime , i my free time , a started to download and study
different .pdf files from Altera , about Nios II , Quartus II , and else .
I want to ask if is possible create a vhdl file , describeing a component Timer
;this component will accept these parameters :
-start
-stop
-Preset
Like using timer in plc , TON and TOF timer.
In his hw it elaborate every 100 ms a counter if the start-bit is true ,and when
the the counter il >= then Preset it return Done .
In Nios II ide i want to use like this
IF (mycondition=true)
{
Timer.start=true;
Timer.Preset=1000; // 1 Sec
}
else
{
Timer.stop=true;
Timer.start=false;
}
...........................// other logical
IF (Timer.done=true)
{
//.......excute something
}
When i test done my Timer , i can to use a lot of this component .
It's possible make this using SOPC?
i suppose "of course" , but how ?
Regards and thanks
Walter
