Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20703 Discussions

About pin processing of unused input pins for Cyclone V.

YTsuj6
Beginner
453 Views

FPGA:Cyclone V (5CEBA7F23C7N)

 

Can I use the input setting IO pin in the open state when it is not used?

There is a model where the FPGA circuit is common and the external circuit is different, so the settings are common.

0 Kudos
2 Replies
ShafiqY_Intel
Employee
385 Views

Hi YTsuj6,

 

The Unused Pins must connect as defined in the Quartus Prime software.

Below are the options for unused pins:

unused pins in Cyclone V.png

 

Thanks

 

0 Kudos
sstrell
Honored Contributor III
385 Views

You can also set this on an individual pin-by-pin basis using the Pin Planner. Right-click a pin in the Package View, go to Reserved Pins, and select an option.

 

#work4intel

0 Kudos
Reply