Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20641 Discussions

Altera mm interconnect

Altera_Forum
Honored Contributor II
1,880 Views

Hi All, 

Please anyone explain the functionality of altera_mm_interconnect. If you have any link for that please post . 

 

Thanks 

Venkat
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
755 Views

Hi Venkat, 

 

I believed you are referring to Avalon Memory Map interface. Avalon interface is generally a bus interface used to connect multiple different design IP block together. You can find out more about Avalon Interface spec in  

 

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/manual/mnl_avalon_spec.pdf 

 

Thanks. 

 

Regards, 

spdl2001 

(This message was posted on behalf of Intel Corporation)
0 Kudos
Altera_Forum
Honored Contributor II
755 Views

The interconnect is generated by Qsys based on component parameter settings and connections between component interfaces. A better resource for learning about the interconnect would be the Quartus Prime Handbook.

0 Kudos
Reply