Can a Max 10 output tolerate be connected to 5V through a 10K resistor during power off, programming and configuration?

[YuanLi_S_Intel]

Hi Pete,

Sorry it cannot be. The reason is because the absolute maximum rating for IO is 3.9V. Anything beyond that will cause damage to the I/O buffer.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/m10_datasheet.pdf (Page 4)

Thank You

[ak6dn]

With 10K pullup to +5V, add a 33K pulldown to 0V. This will cap the node to ~3.8V when not driven by the FPGA output.

The additional 33K load to ground can easily be overdriven by an output (ie, 120uA).