Device: MAX 10 10M08DAF256C8G
Quartus version: 16.0.1 build 218
I kept receiving this critical warning message even I removed lots of redundant pin assignments to keep my design at a minimal level.
"Critical Warning (16248): Pin is placed too close with ADC pins. I/O pins place too near to ADC pins will cause performance degradation on ADC sampling. Please reassign the pin assignment further away from ADC pins and re-run the compilation again."
The pin reported in this error was Pin K5. Pin assignment was attached here.
I did a search and found this link:
Pin K5 is not in Bank 8, so I don't worry too much about it. For curiosity, I build the design with Quartus 18.0 but I still got the same critical warning.
Overall, I am running out ideas to fix this critical warning in Quartus 16 which doesn't make sense to me, since I have an original design which used the same set of pins in addition to more pins and didn't encounter this critical warning at all.
Thanks for your help.
The article you linked to specifically says that you can ignore this warning if you see it for a pin in bank 2, like pin K5 as you mention. So just ignore it.
Kindly find the below KDB for your reference. May be there is a chance of generation of noise by the GPIO pin, So better to follow the Quartus recommendation.
Thanks very much for following up. Basically any critical warnings freak me out. I tried more things after I posted the message here.
- I changed the signal name to a shorter name and reassign pin K5 to it. Wow, the critical warning was gone, but there was another warning "Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details"
- I found this link https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/soluti... , but set_instance_assignment -name <parameter> DEFAULT -to <pin_name> threw errors
- I added the following to the qsf file
"set_instance_assignment -name CURRENT_STRENGTH_NEW 12MA -to Signal
set_instance_assignment -name SLEW_RATE 2 -to Signal"
The "incomplete I/O assignments" warning was gone, but the ADC critical warning was back again
3. I commented the 2 lines I added to qsf and stay with the incomplete I/O assignment warning for now, this is more acceptable.
So basically this is quite funky and I don't know how to fix. If it is the noise issue of the GPIO pin, how to fix? Thanks
I am surprised by the below statement.
I changed the signal name to a shorter name and reassign pin K5 to it.
Logically there is no definition for the above.
For your second question.
Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details"
I strongly believe, in fitter report itself all the effected pin why the above warning is there all will be mentioned.
Requesting to check and update as per the report.
Hope it helps.
No problem ,I will copy the content here for your review
Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
CAUSE: There are one or more pins with incomplete I/O assignments. The I/O Assignment Warnings report section in the Fitter compilation report lists the affected pins and the missing I/O assignments. ACTION: Use the Assignment Editor or the Pin Planner to add the missing I/O assignments to the affected pins.
The drive strength and slew rate warnings will be issued just to let you know that you did not explicitly set a value and will thus get the default value. If that's what you want then you can suppress those warnings, or better yet do what you did and explicitly add the assignments using the pin planner, assignment editor, or typing into your .qsf file (which Intel will probably discourage). If you choose to edit your .qsf directly then the safest way is to close your project since QuartusII typically has the file open as long as the project is open so you can get into contention and lose your edits or corrupt the file.
The ADC pin placement warning is real. It's letting you know that the digital pin could introduce noise into the analog input and degrade your conversion. So if you don't move that pin then your system will function but your A/D conversions may include added noise from the digital domain. If you have a board already done then I would suggest you oversample and filter that channel to compensate for the noise. If you don't have a board then you should move the offending pin. Keep in mind that "too close" may mean on the die, not just the package. For that reason you may slide the pin a row/column away from the analog input and still get the warning. Iteratively bump/move your pins (the pin planner is best for this) until you get a clean compile free of that warning.
Since you already have the board, you can trick the fitter using the following qsf assignment:
set_instance_assignment -name IO_MAXIMUM_TOGGLE_RATE "0 MHz" -to SystemStop
This tells the fitter that it's a static line which won't introduce transients into your analog signal. If that's not the real case you'll still have the noise issue of course but the fitter will be "happy".