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Hi,
We are planning to use 10CL016YU484C8G part in our design. We do not see any recommendation regarding number and values of de-coupling capacitors for each supply in the device datasheet. Can you please let us know the recommended values and number of de-coupling capacitors required for each power supply? In our design, we have provided a 0.1µF capacitor for each supply pin. In addition to this, we have provided a 47µF capacitor for VCCINT supply and a 4.7µF for VCCD_PLL, VCCCA and each VCCO supplies. Please let us know if this is fine. Regards RajaLink Copied
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No it's probably not find but it is very dependent on your application. You need to evaluate the dynamic supply current on each power rail to determine a target impedance and then choose a distribution of capacitors to reach that target impedance over the whole application frequency range.
To find out the dynamic supply currents, if you already have an complete FPGA project compiled in Quartus, you can use the results of the power estimator. If not there is an excel sheet that can give you a power estimation here: https://www.altera.com/support/support-resources/operation-and-testing/power/c10-lp-power-estimator.html Once you have your currents there is a tool that will help you determine what capacitor distribution you should use. Have a look here: https://www.altera.com/support/support-resources/support-centers/signal-power-integrity/power-distribution-network.html
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