Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussions

Error during loading new program for NIOS 2

Gerhard56
New Contributor I
833 Views

Hi,

 

get now an error in a project which worked before. No updates of tools!!

Where to look around?

Downloading elf process failed.JPG

With best regards

 

Gerhard

0 Kudos
1 Solution
Gerhard56
New Contributor I
813 Views

Sorry, solved.

 

Oh my god. After altering the NIOSII by adding a PIO the symbol for the block symbol file was altered too, and gets two grid ticks broader. This breaks the connection to the pin defines for the SDTam clock signal.

No error during compilation, maybe a warning?

Without clock, the SDRam do not work properly and so the download fails....

Sorry about this message.

With best regards

Gerhard

View solution in original post

0 Kudos
1 Reply
Gerhard56
New Contributor I
814 Views

Sorry, solved.

 

Oh my god. After altering the NIOSII by adding a PIO the symbol for the block symbol file was altered too, and gets two grid ticks broader. This breaks the connection to the pin defines for the SDTam clock signal.

No error during compilation, maybe a warning?

Without clock, the SDRam do not work properly and so the download fails....

Sorry about this message.

With best regards

Gerhard

0 Kudos
Reply