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FPGAs with Feedback issues

AsynchronousParallel
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     I am going to be doing some proprietary experimental circuit design using an FPGA and these circuits will require feedback in some instances. Do any of your FPGs allow for feedback because Intel's Cyclone calls this an error and will not synthesize?

 

     I am a new rep for a small software company and I don't have any experience with FPGAs. Please answer the question above if anything but if you want to help even more please help me rewrite the paragraph below. 

 

     FPGAs are a development tool used to simulate a circuit of interest.  They're programmed using the manufacturers software and can be used to simulate any circuit. This is especially important to engineers creating novel circuits because they don't have to actually make the circuit before they test it. However these circuits need to be massaged by the programmer into code accepted by the software compiler.  Lots of programs don't run initially and need to be debugged to function. These circuits run from start to finish in ladder logic sequence.

 

Thank you to all who respond.

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sstrell
Honored Contributor III
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Here is how I would rewrite your paragraph (rather significantly):

FPGAs are programmable devices that allow you to create custom logic designs in hardware without the need to build an ASIC or use multiple chips on a board.  They can be reprogrammed with the same or a different design "in situ" at any time.  You can simulate an FPGA design in a simulation tool, but that design can then be implemented with full functionality in the FPGA.  An FPGA design is created, compiled, and programmed using the manufacturer's software. This is especially important to engineers creating novel circuits because they don't require any other hardware on their board to implement the circuit other than just the FPGA. FPGA designs are typically created in a hardware description language (HDL) to describe the behavior of the circuit and then compiled by the design software.  The design software has many debugging tools to help with everything from creating the initial design all the way through testing the design while it's running in the FPGA.

 

Side note: while FPGAs can be used for ASIC prototyping (which I think is what you are thinking about here), this is not a huge part of the development base for these devices.

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sstrell
Honored Contributor III
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Here is how I would rewrite your paragraph (rather significantly):

FPGAs are programmable devices that allow you to create custom logic designs in hardware without the need to build an ASIC or use multiple chips on a board.  They can be reprogrammed with the same or a different design "in situ" at any time.  You can simulate an FPGA design in a simulation tool, but that design can then be implemented with full functionality in the FPGA.  An FPGA design is created, compiled, and programmed using the manufacturer's software. This is especially important to engineers creating novel circuits because they don't require any other hardware on their board to implement the circuit other than just the FPGA. FPGA designs are typically created in a hardware description language (HDL) to describe the behavior of the circuit and then compiled by the design software.  The design software has many debugging tools to help with everything from creating the initial design all the way through testing the design while it's running in the FPGA.

 

Side note: while FPGAs can be used for ASIC prototyping (which I think is what you are thinking about here), this is not a huge part of the development base for these devices.

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AsynchronousParallel
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Thanks sstrell !!!

 

    FPGAs are made up of logic gates that are routed together and easily rerouted using HDL and the software provided. Manufacturers of FPGAs create development boards that include additional hardware devices such as real time clocks, CPUs, and I/O that can be routed to the configured FPGAs. Have I written anything false? or perhaps it can be rewritten better?

 

So HDLs are not the only way to create logic designs of FPGAs? What other ways are there?

ASICs are expensive right, that's a reason to use FPGAs as an end product? 

 

Thanks again! 

I welcome others to answer as well. Thank you! 

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sstrell
Honored Contributor III
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Well, most dev kits don't have a separate CPU.  You can implement that in the FPGA, either a soft processor made up of FPGA logic resources (Intel's soft processors are called Nios II and now the new Nios V) or a hard processor on the same FPGA die (Intel uses ARM Cortex processors in their SoC devices).

You can create a design in many ways.  HDL is the main way, but you can create a schematic, build a system design graphically (Platform Designer in Quartus), or through software development (oneAPI, HLS, OpenCL).

Yes, ASICs have a large initial upfront cost to create the fab for the chip, and if there is the slightest error in the design, you have to redo it.  With an FPGA, if an error in the design is found, just fix it in the design tool and reprogram the device, which can even be done in the field.

Paveetirra_Srie
Employee
660 Views

Hi,

Just wanted to check with you, based on few suggestion provided to your following query, is your concern has been addressed? 

If yes, kindly do let me know.

Thank You


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Paveetirra_Srie
Employee
641 Views

I’m glad that your question has been addressed, I now transition this thread to community support. 

If you have a new question, feel free to open a new thread to get the support from Intel experts.

Otherwise, the community users will continue to help you on this thread. 

Thank you.


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