Hi Sir, My cyclone 4 is receiving 8bit differential data(8p,8n total 16 lines). I wanted to take this data and convert to single ended. Please give me the steps need to follow for the same.

[DMoha11]

I am using quartus II. Can I take only p lines and add to the pin planner like single ended? How to choose io standard for differential input data in pin planner?

Thank you

[YuanLi_S_Intel]

Hi Dineesh,

You may use our LVDS IP for that. It will helps to receive differential data and then allow you to use it in FPGA internal logic.

You may refer to LVDS Cyclone IV guide at link below:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an479.pdf

Thank You.

[DMoha11]

Thanks a lot...