Doing reference design of PCI Express design as per "ip compiler for pci express" (https://www.altera.com/literature/ug/ug_pci_express.pdf). After running simulation of the design for 212 ns got stuck with Error "Illegal value of powerdown in p1 state". How can I rectify this problem?
http://www.alteraforum.com/forum/attachment.php?attachmentid=10993&stc=1
