Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20693 Discussions

I/O default problem

Altera_Forum
Honored Contributor II
1,069 Views

Hi, 

I'm working with DE0 development board. When I'm trying to compile my code i get the following message: 

 

"Error: Pin SFL:epromldr|altserial_flash_loader:altserial_flash_loader_component|\GEN_ASMI_TYPE_2:asmi_inst~ALTERA_DCLK is incompatible with I/O bank 1. It uses I/O standard 2.5 V, which has VCCIO requirement of 2.5V. That requirement is incompatible with bank's VCCIO setting or other output or bidirectional pins in the bank using VCCIO 3.3V". 

 

When I switched to"2.5V (default)" in the pin planner the problem will not appear. I what the I/O to be 3.3V LVTTL. how can I change that? 

If I delete the "flash loader" from my code the compilation should be o.k. 

(Of Corse, I need the flash loader in order to load my program after power up…)  

 

Idan 

0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
335 Views

The pin is a part of the I/O bank.  

If u whant to apply these setting to one pin of the bank u need to apply it to the whole bank.  

This bank is set to 2,5V so u need to change all the pins to 3,3V
0 Kudos
Altera_Forum
Honored Contributor II
335 Views

All DE0 IO banks are powered by 3.3V. Also the serial flash needs 3.3V. Sounds like you have set an 2.5V IO standard where it shouldn't be.

0 Kudos
Altera_Forum
Honored Contributor II
335 Views

I tried to change all of the pin's (in Pin Planner), but it didn't help… 

What else can I do?
0 Kudos
Altera_Forum
Honored Contributor II
335 Views

I guess, you have an incorrect setting of 2.5V somewhere in the device assignments. Because DE0 has an I/O voltage of 3.3V for all banks, there must be no 2.5V setting.

0 Kudos
Reply