Load from EPCQ fail

[JBenj]

I have a Cyclone V FPGA connected to an EPCQ128 as depicted in the standard configuration for the device. I am able to load the .jic file and the .sof file but whenever I kill power to my board and reboot, in order to test the load from memory, there is an issue. Putting a logic analyzer on the FPGA pins I see that the Config Done pin is low and the Config pin is high. It appears as if the FPGA is trying to restart the process but is unsuccessful. I also want to note that the issue appears on two boards meaning that it is not random or by chance. 

[Nooraini_Y_Intel]

Hi JBenj,

Did you set the configuration scheme to Active Serial mode in the Device and Pin option in the Quartus project design before compilation? How did you generate the .jic file? Please provide the steps or the screen shots showing the steps.

Regards,

Nooraini

[JBenj]

Nooraini,

I did as the PDF shows. I did set the Device Pin option in the Quartus project before compilation. I generated the .jic file with quartus.

[Nooraini_Y_Intel]

Hi,

Did you scope the nCONFIG, nSTATUS and CONF_DONE signal when power up? Is the nSTATUS signal stay high all the time after nCONFIG goes high? Or did the nSTATUS signal toggle? Is the CONF_DONE signal is directly pull up to the VCCPGM via 10kohm? If you have any other component such as LED or external host connecting to the CONF_DONE, remove those component. Potentially these extra component can hold the CONF_DONE low. Ensure the CONF_DONE signal is connected to VCCPMG via 10kohm pull up.

Regards,

Nooraini

[JBenj]

Noorani,

The STATUS pin is high, CONFIG DONE is low, CONFIG is high. It does appear that there is a reset with the programming and the STAUS pin does go from low to high. It also appears that DATA0 begins transmitting slightly before the CSO goes low in certain instances.​

[Nooraini_Y_Intel]

Hi,

Is the CONF_DONE signal is directly pull up to the VCCPGM via 10kohm? If you have any other component such as LED or external host connecting to the CONF_DONE, remove those component. Potentially these extra component can hold the CONF_DONE low. Ensure the CONF_DONE signal is connected to VCCPMG via 10kohm pull up.

Are you using EPCQ128 or EPCQ128A? Did you try to perform ASx4 mode or ASx1 mode? If the ASx4 mode failed then try to change Active Serialx1 mode in the Device and Pin option in the Quartus project design can recompile to get new .sof file. Generate a new .jic and program it into the flash device and monitor if the configuration still fail (CONF_DONE low) or successful (CONF_DONE high).

Regards,

Nooraini

[JBenj]

The pinout for ASx1 does not match the pinout for ASx4. I have a EPCQ128A device. I'm not too sure of what the difference is between the EPCQ128 as the datasheets appear the same to me.​

[Nooraini_Y_Intel]

Hi,

If you have build board with the Cyclone V interfacing EPCQ128A with ASx4 mode, then you can still use ASx1 mode. There is no need for you to make any hardware changes on the board. The pin connections are not that different between ASx4 mode and ASx1 mode. If the board was originally built using EPCQ128A with ASx1 mode, then you cannot use ASx4 mode since the 2 data pins (DATA[3..2] pin) are not connected.

As mentioned before, try to change the configuration setting to Active Serialx1 mode in the Device and Pin option in the Quartus project design and recompile to get new .sof file. Generate a new .jic and program it into the flash device and monitor if the configuration still fail (CONF_DONE low) or successful (CONF_DONE high).

Regards,

Nooraini