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Hello,
what is the maximum non-destructive voltage level, which can be tolerated for limited period of time by MAX10 ADC input channel, provided VCCA and VCCIO1A are 3.3V for single supply device?
ADC user guide (UG-M10ADC) says "In single supply MAX 10 devices, it can measure up to 3.0 V or 3.3 V, depending on your power supply voltage."
Data sheets specifies maximum input voltage to Vref.
Thanks in advance.
Frank
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Hi Frank,
Thank you for reaching out Intel FPGA Community.
How about your ADC Supply Voltage (VCC_ONE)?
Regards,
Aqid
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Dear Aqid,
sorry for my late answer. I missed your reply.
VCC_ONE is also powered by 3.3V domain (same as VCCA).
Best regards
Frank
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Hi Frank,
According to datasheet, as you mentioned, the analog input voltage can go up to Vref, while Vref can go up to VCC_ONE as the maximum value.
Since your VCC_ONE is 3.3V, the maximum analog input voltage would be 3.3V. It is similar with the statement you found in the ADC user guide.
Regards,
Aqid
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Hello Aqid,
In order to exclude any misconceptions: Let me rephrase my question.
With respect to below voltage conditions, would an ADC input voltage of up to 3.3V (Vadc_in > Vref & Vadc_in <= VCC_ONE) cause any damage or impact device reliability or life time?
Vref = 3.0V
VCC_ONE = 3.3V
VCCAx = 3.3V
VCCIO1A = 3.3V
Best regards
Frank
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For a better situation, I would suggest you increase the Vref to 3.3V or else, keep the Vin not exceed 3.0V (follows the value of Vref as per datasheet) as I do not have the confidence it will not have any impact for the device in a certain period of time.
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