May DCLK toggle in user mode after PS configuration?

[Altera_Forum]

So far I only used AS-mode and JTAG for FPGA configuration. 

 For a new C4 design I want to use PS-mode. Because I only have one clock source on my microcontroller, I want to use this clock-signal for both configuration and as a user clock. DCLK is not dual-purpose in PS-mode, so I want to route this clock-signal to DCLK as well as another dedicated clock input.  Does it harm to keep the clock running on the DCLK pin in user mode? Of course the nCONFIOG pin will not be touched.  The doc says: in user mode, drive dclk either high or low when using the ps configuration scheme, whichever is more convenient. Well, more convenient for me is to let it toggle. Should that be possible without problems?  I'm going to test it myself, but I want to know if this has been done before.  Thanks, Ton

[Altera_Forum]

I did the exact same thing on an Arria GX and it works great. I routed DCLK to another pin and once the PS config is done, I use the other pin as a clock for a part of my system. Before I did this, I did a lot of digging and found in one of the Arria documents that DCLK can toggle after the config is done. I forgot which document that was.

[Altera_Forum]

--- Quote Start ---  I did the exact same thing on an Arria GX and it works great. I routed DCLK to another pin and once the PS config is done, I use the other pin as a clock for a part of my system. Before I did this, I did a lot of digging and found in one of the Arria documents that DCLK can toggle after the config is done. I forgot which document that was.  --- Quote End ---    Hi Moose of Iron, Good to hear that you got this working. That gives me confidence. I will also test it and post the results. That may take some time, because of lack of hardware at this moment.  Regards, Ton