Programmable Devices
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Memories (Flash, ROM and RAM)

JesusAngelG
Beginner
355 Views

Hello,
I want to implement Flash, ROM and RAM memories on the DE1-SoC board using the MegaWizard Plug-In Manager tool or any other wizard-type tool. Could you recommend me any manual, book or workshop that will help me learn how to use this type of memory generation tools for the Quartus Prime Lite software?

Regards

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sstrell
Honored Contributor III
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You just add them as IP from the IP Catalog in Quartus.  Parameterize them and instantiate them in your design.  The Quartus User Guides are a good place to start: https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-software/user-guides.html

And you can find tons of training at the training web site: https://learning.intel.com/developer/pages/128/intelr-fpga-training

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JingyangTeh
Employee
271 Views

Hi


You could take a look ah the embedded user guide on the use of the IPs .

The IPs that you are interested are On Chip Memory IP, Generic Serial Flash IP.

https://www.intel.com/content/www/us/en/docs/programmable/683130/24-1/introduction.html


Regards

Jingyang, Teh


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JesusAngelG
Beginner
263 Views

Thank you very much, your answers have been very helpful.
Continuing with the subject of memory, I want to learn how to use the SDRAM memory that the Altera DE1-SoC contains. I tried to access the following intel server ftp sites but an error message appears. How can I access this information?

Thanks

Regards

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FvM
Honored Contributor I
247 Views

SDRAM (non-DDR) IP has been removed in recent Quartus versions, apparently respective tutorials too.

Need to refer to Quartus-20 or before. Tutorials are still around on the Internet, I think.
https://community.intel.com/t5/Programmable-Devices/Where-is-the-SDRAM-controller-IP-in-Quartus-21-Lite/m-p/1371523#M84283

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JingyangTeh
Employee
66 Views

Hi


In addition you could take a look at the SDRAM Controller IP in the embedded user guide below:

https://www.intel.com/content/www/us/en/docs/programmable/683130/24-1/sdram-controller-core.html


Regards

Jingyang, Teh


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