Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussions

PCIe length between differential pair matching.

Altera_Forum
Honored Contributor II
‎07-30-2010 02:22 PM
1,407 Views

Hello all.  

 

I see that Altera dev. board with ArriaGX II have a differential pair matched length between FPGA and PCIe. Bit I can't find any reason for that. PCIe standard say that only length will be matched between positive and negative wires in same diff pair.
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎07-30-2010 04:09 PM
686 Views

Yes, perhaps the developer didn't know.

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.