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Quartus 18.1 Lite Platform Designer DDR3 Controller can't build when WSL is enabled

New Contributor I

For a project with a DDR3 SDRAM Controller, I am using Quartus 18.1 Lite with Platform Designer on a Windows 10 PC.

After installing WSL (Windows Subsystem for Linux), an error occurs when I try to generate code in Platform Designer., even trough Quartus 18.1 should not depend on WSL. 

The immediate error is "Cannot find sequencer/sequencer.elf", where it appears that a Makefile fails to generate the file sequencer.elf.

When looking into the Quartus 18.1 scripts, is appears that the bash script:
is not run from a generated temporary Makefile, which has the line:
    C:/intelfpga_lite/18.1/quartus/../nios2eds/sdk2/bin/nios2-bsp hal sequencer_bsp .. --default_sections_mapping sequencer_mem --use_bootloader DONT_CHANGE

The Makefile is run through the script:
with the line:
    exec $@
where the argument $@ is:
    make all 2>> stderr.txt

So it appears, that somehow enable of WSL causes execution of the bash script "c:/intelFPGA_lite/18.1/nios2eds/sdk2/bin/nios2-bsp" to fail when it is called from the temporary Makefile.

The error and some script arguments are shown in the picture below.

Error in PD when building DDR3 Ctrl. code after installation of WSLError in PD when building DDR3 Ctrl. code after installation of WSL

If I disable WSL in Windows 10, then generation of code in Platform Designer works again.

Since WSL is mandatory for e.g. Quartus 21.3 Pro, which I also have to use, it effectively requires me to enable and disable WSL and then reboot my PC each time I go between Quartus 18.1 Lite and Quartus 21.3 Pro.

Note that another, and *maybe* related, problem with DDR3 controller and WSL has been reported in e.g.


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