CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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I use BANK 3、4 and BANK5、6 of EP3C16F484 in controlling 64Bit DDR2 , can I use the Unused IO PINs of these banks as the input for 1.8V LVTTL signal ? thanks.
--- Quote Start --- can anyone tell me? --- Quote End --- Quartus II can. Input a design with the DDR controller and your I/O. If Quartus accepts it, then you are good to go. Cheers, Dave
