Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Question of Cyclone3 and DDR2

Altera_Forum
Honored Contributor II
‎11-21-2011 03:18 AM
1,152 Views

I use BANK 3、4 and BANK5、6 of EP3C16F484 in controlling 64Bit DDR2 , can I use the Unused IO PINs of these banks as the input for 1.8V LVTTL signal ? thanks.

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Altera_Forum
Honored Contributor II
‎11-22-2011 02:06 AM
448 Views

can anyone tell me?

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Altera_Forum
Honored Contributor II
‎11-22-2011 02:09 AM
448 Views

 

--- Quote Start ---  

can anyone tell me? 

--- Quote End ---  

 

 

Quartus II can. Input a design with the DDR controller and your I/O. If Quartus accepts it, then you are good to go. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
‎11-23-2011 04:45 AM
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thanks! 

thanks!
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