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Greetings Cyborgs. I am new here and i am a noob.
My goal is to conceive a bus switch which connects each 64 possible input to each possible 64 output. I need to implement just 64 pieces of 1:64 MUX in an FPGA/CPLD. I need at least 128 pins (64 for input, 64 for output) for io but i dont know other sources which i am going to need.
Which FPGA/CPLD suits my needs and why?
Best, regards. Sorry for my bad English.
- Tags:
- fpga cpld
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Hello,
Sorry for the delay. To answer your question. We highly suggest using Stratix 10 due to its high logic capacity and I/O capabilities.
For more information regarding Stratix 10, it can be access through the link below.
Link : Intel® Stratix® 10 FPGAs Overview - High Performance Intel® FPGA
Hope that answers your question.
Best regards,
Nazrul Naim
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Depends a lot on what type of I/O you require and the data rate of the I/O.
Would 3.3V LVCMOS at 50MHz maximum meet your needs? Or is much slower ok? Or do you need much higher speed?
Any specific package requirements? Is a BGA ok, or do you prefer a leaded SMT package?
Basically there are MAX10 and Cyclone4 or Cyclone5 parts that should meet your needs, depending on your detailed requirements.
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Hi,
As we do not receive any response from you on the previous question/reply/answer that we have provided, for now I will set this case to Close-Pending.
Regards,
Nazrul Naim
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