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Undefined behavior in my key detection

Altera_Forum
Honored Contributor II
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I am designing a shift key detector.I wrote a test bench. The test showed that my implementation was incorrect. See attachment for the screenshot of ModelSim simulation. 

 

 

Beside the undefined behavior, why is there such a big gap between 3rd and 4th values? If you look at the test bench, the 3rd and 4th procedures are using the format used for the 1st and 2rd. 

 

 

As you can see. I have two states in my design. PS2 receiver will filter and generate clean 8-bit make code when a key is pressed (or released). The break code is simply F0 follow by the make code of the key just released. My state machine uses two extra bits to keep track of which shift key has been pressed. 

 

 

left_pressed and right_pressed are signals, not variables. So they should have the a value at any instance. If one of them changes, the connection to shift signal will be updated automatically. 

 

 

 

Can someone please help me? Thanks. 

Thanks.
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Altera_Forum
Honored Contributor II
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first of all - current_state is missing from the sensitivity list of the state machine process. 

 

Secondly, you have created latches because left/right_pressed signals are not assigned values in all cases. This is also the case with the next_state signal. You HAVE to assign all signals in ALL cases in asynchronous processes to avoid latches.  

 

In this case, left_pressed is set to '1' at the start, but right_pressed stays at 'U' (uninitialised). '1' or 'U' gives '1', but when left_pressed goes to '0', '0' or 'U' gives 'U', hence the shift output. 

 

So the problems to fix: 

Assign next_state, left_pressed and right_presssed in ALL branches of the process. Or, to make it easier, use the single process state machine template instead of 2 processes. it is less prone to errors.
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Altera_Forum
Honored Contributor II
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Hi Tricky, Thank you for your input! It was very helpful to get moving. 

 

My revised code is in attachment. Thanks 

 

 

I gave default values to left and right pressed. 

 

But where do I place next_state <= current_state; 

Is this what you mean by assigning a value to next_state? 

 

Right now I left it in the second process, which is WRONG from what I understand.  

 

Thanks!
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Altera_Forum
Honored Contributor II
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initialising the left and right pressed wont make a difference, it will still create latches because they are only assigned in specific conditions. They need to be assigned in ALL cases, OR they need to be in a clocked process. It is the same with the next state assignment. You need to assign the next state in ALL if branches.

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