If you open S10 NativePHY IP, then there is a list of selection of supported frequency range for user to choose from
As for the source of transceiver refclk pin like CDR refclk, you can connect it to on board oscillator, crystal or clock generator chip.
I wanted to use transceiver toolkit in my design. Design is compiled with quartus 19.1.
Can I use the transceiver toolkit of the design with quartus 19.3.
Is there any dependany on quartus version.
Thanks.I am able to run the transceiver toolkit design in 19.3.
Is there any options to control the IP settings of PHY and PLL outside the GUI.
For Example if I want to change the data rate and other settings of the IP without opening platform designer GUI?
One of the method will be to use dynamic reconfiguration feature to change transceiver setting in real time operation.
You can read more about dynamic reconfiguration feature in below user guide chapter 6
I don't want to change the settings dynamically. I want to compile new build with new settings of IP.But It would be easy if i can do it outside GUI so that I can use some script to change the settings and compile.
Ok, I understand what you want now.
You can refer to Quartus handbook doc (chapter 9.19 Qsys Pro Command-Line Utilities, page 385 onwards) for the scripting command line support
One thing to take note is this is more dangerous path as compared to IP generation by GUI. You need to know and set the correct parameter for proper IP generation.