Programmable Devices

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Programmable Devices

Discussions

5AGXFB3H4F35C5NES device support

TCP Ethernet packet in FPGA?

License problem after reinstalled the software DS-5 AE

LVDS Signal DC offset and AC Swing

About the LVDS output swing

Max v cpld programming

MAX-10 FPGA, Voltage level on PLL_CLKOUT pins

Can't create new service request

Timing failure on internal paths

Strange PLL Clock causing me failing paths in cyc V design

Include Header not found in the project: Altera-SoCFPGA-HardwareLib-GPIO-CV-GNU

CYCLONE10GX SERDES clock

EyeQ on Arria 10 GX (Dev. Kit DK-DEV-10AX115S-A)

Fpga alarm clock (urgent help)!

generating .hex programming file from Quartus Prime

Featured Content

LPM_MULT not working for Cyclone 10 GX device

Need help with timing constraints/closure for an EMIF design

Error running Agilex 5 LPDDR4 example design simulation

I350 igb driver failed with error -2

Request for the Product Lifecycle Status

Solution: USB Blaster Driver for Windows 11 ARM

Re: Where can I find a reliability report for Cyclone 10 LP devices?

Re: MAX10 (Select Internal Configuration mode with ERAM )