"Communications" Posts in "FPGA"

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APS Networks launches three OpenBNG Broadband Network Gateways incorporating Intel® Xeon® D processors, Intel® Tofino™ Switch ASICs, and Intel® Stratix® 10 MX FPGAs

Open BNG is an initiative within the Open Optical & Packet Transport (OOPT) Project Group’s Disaggre...
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Intel at MWC: Panel Discusses “How is the O-RU reference architecture driving 5G Radio Development?”

Telecom operators need to reduce development time and while implementing new solutions to increase t...
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Designing High-Performance ATE, RF, or Communications Test Equipment? Here’s why you need Intel® Agilex™ FPGAs

It’s tough developing test equipment for leading-edge products because the test equipment must have ...
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Intel’s new technology puts ADCs and DACs operating at 64 Gsamples/sec into packaged FPGAs

Intel has announced new technology that combines FPGA die with high-speed analog chiplets that incor...
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SmartNICs based on Intel® FPGAs Boost Converged Broadband Network Performance

To meet consumer demands, telco providers that offer both wireless and wireline access to customers ...
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Intel and partners announce high-performance SmartNICs that deliver programmable network acceleration for cloud data centers and communications infrastructure

Intel has been a leader in Ethernet networking since the very beginnings of the IEEE 802 standard. T...
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Nokia AirFrame Edge Server based on 2nd Gen Intel® Xeon® Scalable CPUs and the Intel® FPGA PAC N3000 suits edge and far-edge cloud RAN, MEC, and 5G deployments

Nokia AirFrame open edge servers feature an ultra-small footprint so they fit well in many locations...
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ServeTheHome.com publishes in-depth, hands-on review of the Supermicro SYS-1019P-FHN2T SuperServer with an Intel® FPGA Programmable Acceleration Card N3000

ServeTheHome.com (STH), a Web site that bills itself as “the IT professional's guide to servers, sto...
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Arrow Electronics™ develops four complete RF reference platforms based on the Intel® Arria® 10 SoC FPGA and Analog Devices high-speed RF transceivers, ADCs, and DACs

The JESD204B serial interface has become the interface standard of choice for high-speed analog-to-d...
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Ciena leverages Intel technology for flexibility and programmability to accelerate the adoption of O-RAN in 5G New Radio (NR) and Next-Generation LTE.

Ciena recently announced three new xHaul (fronthaul, midhaul, and backhaul) routers – the multivendo...
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New Video Demonstrates 116 Gbps PAM4 Transceiver Test Chip for Intel® Agilex™ I-Series FPGAs

A new Intel video shows the latest performance results for a high-speed, long-reach (LR) transceiver...
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Open vSwitch for NFVi based on Intel® FPGA Programmable Acceleration Card (Intel FPGA PAC) N3000 achieves first-packet learning rate of 500K rules/sec, near-wireline performance

As the numbers of subscribers, competitors, and technology advances grow, communications service pro...
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Hardware Acceleration and Segment Routing over IPv6 (SRv6) help CoSPs Optimize and Simplify their Networks

Communications service providers (CoSPs) are seeking ways to differentiate themselves and to enhance ...
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Can the new Intel® eASIC™ devices help you reach your 4G and 5G equipment design goals?

By Ronnie Vasishsta, VP and GM, Intel Corporation There is a lot of discussion in the industry today...
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