PCIe x4 Root port implementing: Cyclone V vs. Cyclone IV

[Altera_Forum]

I want to implement a PCI express root port using a FPGA. My question is simple, It would be enough with an IP_Compiler for PCI Express or it would be necessary a Avalon-MM Cyclone V Hard IP for PCI Express.The issue is about the need of a Cyclone V FPGA or if is enough a Cyclone IV FPGA.

[Altera_Forum]

As long as the FPGA has the PCIE Hard IP core, the core can be configured to either rootport or endpoint regardless of the FPGA families.