FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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hd-sdi

Altera_Forum
Honored Contributor II
‎09-28-2011 05:29 AM
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AM NOT ABLE TO UNDERSTAND THE OUTPUT OF hd-sdI INTERFACE IP CORE .. CAN ANYBODY PLZ HELP ME

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Altera_Forum
Honored Contributor II
‎09-28-2011 06:31 AM
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it's LVDS, if You're talking about SDI TX or 20 bit data if RX. Read the docu, there's everything You need to know.

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Altera_Forum
Honored Contributor II
‎09-28-2011 06:40 AM
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in the hd-sdi transmitter am giving data 20 bits , Transmitter line number 22 bit and am getting serial out . 

 

i would like to know how the serial out is coded . 

 

for this process i tried to connect transmitter and receiver but then am not able to get the receiver output . 

 

plz guide me through it ..
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Altera_Forum
Honored Contributor II
‎09-28-2011 07:26 AM
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Again: READ THE DOCUMENTATION. There's functional description.  

You'll also need SMPTE 292M standard for full understanding of the data coding.
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Altera_Forum
Honored Contributor II
‎09-28-2011 09:17 AM
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thank you .i got it .

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