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Dear colleagues!
Please specif me the traces from FPGA to GPIO HEADER on De0-nano board are length matched? Will the integrity of the signal at 200MHz be affected? Specify, please, the lines from FPGA to GPIO HEADER are aligned along the length? Will the integrity of the signal at 200MHz be affected?- 태그:
- gpio
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--- Quote Start --- Dear colleagues! Please specif me the traces from FPGA to GPIO HEADER on De0-nano board are length matched? Will the integrity of the signal at 200MHz be affected? Specify, please, the lines from FPGA to GPIO HEADER are aligned along the length? Will the integrity of the signal at 200MHz be affected? --- Quote End --- I asked to Support and they answered what De0-nano not for high speed signals. Please close thread.
