Hello,
I have a Max1000 development board and would like to perform a remote system upgrade with it.
I have programmed an SPI interface to send the required data. (Here not necessarily SPI must be used, but I think another interface does not change my problem). Now I want to program the RSU without the Nios.
I have gotten to the point where I need the dual boot ip core to configure the "dual compressed image". An onchip-Ram to store the necessary data and an onchip-Flash to write to the CFM. But here my flash has only an address size of 17 bits, but to rewrite the CFM the address must be at least 18 bits.
Am I missing something here? Is it possible to rewrite the CFM with SPI like this?
Link Copied
Yes, I am using the Platform Designer. I put the onchip-flash, onchip-memory and dual_boot in a Qsys file and added it to the project. I link the signals externally. I'll add a scrrenshot of it.
I would like to implement the RSU not with the Nios, but with an own logic circuit. So that I write the VHDL code myself to read and write the register and read from the flash or write on the flash. I could already read the register and got the expected data. It should not really change my problem if the Nios or something else is connected, because it does not increase the size of the addresbus from the onchip flash.
This is how a part of my interface to the onchip flash should look like then. I read the register, then I write in the register the command to clear a page and wait until the bit in the register is set that the clear was successful. But no matter how that looks, it shouldn't change my problem.
-- -------------------------------------------------------------------------------------
-- erase Page or sector
-- -------------------------------------------------------------------------------------
procedure register_erase (
i_data_register : in std_logic_vector(31 downto 0)) is
begin
CASE operation_register IS
-- 1. read in which mode flash is
-- 2. write erase command in register 0x01
-- 3. Check register 0x00 wheather erase was sucessful
-- 4. reset register 0x01
WHEN mode_start =>
onchip_flash_register_addr <= '0';
onchip_flash_register_read <= '1';
IF count_flash <= 5 THEN
count_flash <= count_flash + 1;
ELSE
IF onchip_flash_register_readdata (1 DOWNTO 0) = "00" THEN
-- Flash is in IDLE mode
operation_register <= mode_write;
count_flash <= 0;
ELSE
-- Flash is busy
count_flash <= 0;
count_error_flash <= count_error_flash + 1;
END IF;
END IF;
WHEN mode_write =>
onchip_flash_register_read <= '0';
onchip_flash_register_addr <= '1';
onchip_flash_register_write <= '1';
onchip_flash_register_writedata <= i_data_register;
-- wait a few ns to write in register
IF count_flash <= 10 THEN
count_flash <= count_flash + 1;
ELSE
count_flash <= 0;
operation_register <= mode_check;
END IF;
WHEN mode_check =>
onchip_flash_register_read <= '1';
onchip_flash_register_addr <= '0';
onchip_flash_register_write <= '0';
-- wait a few ns to read from register
IF count_flash <= 10 THEN
count_flash <= count_flash + 1;
ELSE
IF onchip_flash_register_readdata (4 DOWNTO 4) = "1" THEN
-- erase was sucessful
count_flash <= 0;
count_error_flash <= 0;
operation_register <= mode_reset;
ELSE
-- erase wasnt sucessful
count_flash <= 0;
count_error_flash <= count_error_flash + 1;
operation_register <= mode_write;
END IF;
END IF;
WHEN mode_reset =>
onchip_flash_register_read <= '0';
onchip_flash_register_addr <= '1';
onchip_flash_register_write <= '1';
onchip_flash_register_writedata <= x"FF800000";
-- wait a few ns to write in register
IF count_flash <= 5 THEN
count_flash <= count_flash + 1;
ELSE
count_flash <= 0;
operation_register <= mode_start;
operation_flash <= mode_wait;
onchip_flash_register_addr <= '0';
onchip_flash_register_write <= '0';
END IF;
WHEN OTHERS =>
operation_register <= mode_start;
END CASE;
end register_erase;
