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Memory size in Cyclone 10 LP 10CL120YF484

ZhiqiangLiang
New Contributor I
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Hi,

 

I was told that the memory size in Cyclone 10 LP 10CL120YF484 is 540KB in this link:https://community.intel.com/t5/Nios-V-II-Embedded-Design-Suite/Configure-NIOS-firmware-burning-interface/td-p/1686573

 

however, I tried to set RAM size 350KB and ROM size 120KB in Platform Designer and then re-generated HDL code and then re-compiled the project in Quartus. Quartus reported memory not sufficient issue.

 

Could you please help to tell me what is the maximum memory size that I could use?

 

In Eclipse--> right click on project --> Make Targets-->Build-->mem_init_generate,  "nios_core_RAM.hex" whose size is 289KB and "nios_core_ROM.hex" whose size is 193KB are generated, my question is:

what size of RAM and ROM should I set in Platform Designer?

what is the calculation formula to calculate RAM and ROM size using "nios_core_RAM.hex" and "nios_core_ROM.hex"?

 

Do you have a tool to statistics all RAM and ROM used in nios_core.map file?

 

 

ZhiqiangLiang_0-1747278755475.png

 

 

 

 

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JingyangTeh_Altera
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Hi


When the nios compilation completes there will be a statistic of the Nios binary.

For a start you could take a look at the bootmethod for the Nios.

https://www.intel.com/content/www/us/en/docs/programmable/726952/22-1-21-2-0/processor-booting-methods.html


Regards

Jingyang, Teh


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ZhiqiangLiang
New Contributor I
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@JingyangTeh_Altera 

Thank you!

how about the rest questions above?

I paste them as follows:

 

1) Could you please help to tell me what is the maximum memory size that I could use?

 

2) In Eclipse--> right click on project --> Make Targets-->Build-->mem_init_generate,  "nios_core_RAM.hex" whose size is 289KB and "nios_core_ROM.hex" whose size is 193KB are generated, my question is:

what size of RAM and ROM should I set in Platform Designer?

 

3) what is the calculation formula to calculate RAM and ROM size using "nios_core_RAM.hex" and "nios_core_ROM.hex"?

 

4) Do you have a tool to statistics all RAM and ROM used in nios_core.map file?

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JingyangTeh_Altera
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Hi


If you are running the Nios on place in the on chip memory size.

In the Platform Designer, the on chip memory size is adjustable and its maximum size is dependable on the design you have in hand.

To answer the question of 1,2&3, you could set a size that is slightly bigger than the size generated. In your case you could set the on chip memory size to be 300KB.

When you generate the hex file using the script in Eclipse, if it could not fit into the on chip memory, it will generate an error.

What kind of statistic tool that you are looking at? Do you have an example?


Regards

Jingyang,Teh


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ZhiqiangLiang
New Contributor I
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@JingyangTeh_Altera 

 

1) please see the following picture. when I build the C code, I was told 159Kbytes code and initialized data. however, I set 120KBytes RAM and 80KBytes ROM. why the NIOS core is able to run the code that is bigger than 80KBytes ROM?

 

2) when I set 120KByte RAM, I was always told 4576Bytes free for stack +heap. when set 160KBytes RAM, I was also told 4576Bytes free for stack +heap.  That is very weird.

 

3) The tool I am looking for is to count the .data, .bss, .rodata and .text total size that all obj files take. is there a tool?

 

 

ZhiqiangLiang_0-1748247243586.png

 

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JingyangTeh_Altera
784 Views

Hi


Which boot method are you using right now?


Regards

Jingyang, Teh


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ZhiqiangLiang
New Contributor I
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@JingyangTeh_Altera 

I don't know what boot method I am using right now.

what I did is as follows:

1) I assigned 120KB RAM and 80KB ROM in Platform Designer, and initialize RAM and ROM by hex data built by Eclipse.

2) compile Verilog code in Quartus.

3) build C code in Eclipse, and choose "Make Targets" in right click menu of project in Eclipse and choose mem_init_generate. This step will generate hex data of C code.

4) re-compile Verilog code in Quartus.

5) convert sof file to jic file.

6) Program jic file to flash by Quartus-->Tools--> Programmer.

 

Currently, what confused me is:

--> I have ROM, but I Program hex to flash with jic. why can't I program ROM directly? how to program ROM?

--> the hex is programed to flash, which component copied it RAM? how the component knows the flash start address of the hex data so that it can copy it to RAM? where to tell/set the flash start address of hex data?

--> what is the purpose of ROM in my design? Can I remove it?

 

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JingyangTeh_Altera
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Hi

 

Could you take a look at the vector option that you have selected under the NiosV settings.

The screenshot below.

2025-06-04_11h39_11.png

For booting from on chip memory, the vectors should be set to on chip memory.

https://www.intel.com/content/www/us/en/docs/programmable/726952/25-1/hardware-design-flow-37139.html

 

Could you try taking a look at the link below for a step by step to create a NiosV project.

https://community.intel.com/t5/Nios-V-II-Embedded-Design-Suite/Nios-V-Processor-Installation-and-Hello-World-Execution-Part-1/m-p/1552554#M52380

 

Regards

Jingyang, Teh

 

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JingyangTeh_Altera
536 Views

Hi


Did you go through the link in the previous comment?

Do you have any follow up question?


Regards

Jingyang, Teh


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JingyangTeh_Altera
430 Views

Hi


As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Regards

Jingyang, Teh


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