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Greetings, After compiling the top level module , The compilation report shows no hardware percentage consumption.

Zeid
Beginner
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intel community.PNGchecking intel.PNGA BDF ( schematic is provided ) with some editing due to the sensitivity of the design, in addition to the report.

Also after compilation the report is not showing the registers used in this hierarchical design. this is the second time am facing this problem. 

 

Thanks in advance 

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MEIYAN_L_Intel
Employee
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Hi, May i have your design file? So that i can duplicate the problem. Thanks
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Zeid
Beginner
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Hi,

I cant provide the design file because it is very sensitive and classified work.

 

but, is there anything in mind for such a problem ?

 

Is there another way for helping instead the option of sending the design file ?

Much appreciation.

 

 

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MEIYAN_L_Intel
Employee
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Hi, Can you try to upgrade the Quartus Prime Standard to the latest version 18.1? If the problem still exist, can you provide the screenshot of Tools>Netlist Viewer>RTL viewer. Thanks
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Zeid
Beginner
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13.PNGHi,

 

Here is the screenshot for the RTL Viewer

 

Thanks

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MEIYAN_L_Intel
Employee
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Hi,

From the RTL Viewer,

Can you try to upgrade to Quartus Prime Standard version 18.1?

If the problem is not fixed, can you try to give me a simple test design file?

So that, I can duplicate the error as well.

Thanks

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