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15469 Discussions

A comment causes compilation error !

AAlas3
New Contributor I
334 Views

Hey guys,

I am doing a project and I found out that this comment caused a compilation error! I just don't know why

comment : /*/\/\/\/\/\/\/\/\/\/\*/

could anyone please tell me why ?

0 Kudos
4 Replies
sstrell
Honored Contributor III
166 Views

What does the error say? Perhaps the first * is being interpreted as the start and end of the comment.

 

#iwork4intel

AAlas3
New Contributor I
166 Views

it says:

"Object(the name of the signal) is not declared, Verify the object name is correct. If the name is correct, declare the object."

for all regs and wires inside the Verilog code

Vicky1
Employee
165 Views

Hi,

Could you please check with Verilog-2001 version? older version of verilog might not supported.

'Assignments' Menu-> 'Settings'.Verilog2001.JPG

Regards,

Vicky

AAlas3
New Contributor I
165 Views

Yes it is Verilog 2001, I think this happened because of the escaping mechanism in Verilog (\ " ")

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