Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17268 Discussions

** Error: (vsim-3033)

Elias97
Novice
2,228 Views

Hello, good afternoon, I am writing this post to ask you about an error that modelsim gives me when simulating my project, in which I am using two components: PLL intel fpga ip and PLL Reconfig intel fpga ip, these two components were generated from the Quartus 18.0 library and I made a top level in which I instantiated the two previously named components. The project synthesizes well and does not give errors, but when performing the simulation, I select the top level to simulate and it gives me this error: # ** Error: (vsim-3033) /build/swbuild/SJ/nightly/18.0std/614/l64/work/modelsim/eda/sim_lib/altera_lnsim.sv(27863): Instantiation of 'cyclonev_ffpll_reconfig' failed. The design unit was not found.

Labels (1)
0 Kudos
3 Replies
ShengN_Intel
Employee
2,192 Views

Hi,

 

Done simulation. Check the file and image attached. Go to folder simulation -> modelsim -> execute test_run_msim_rtl_vhdl.do in modelsim.

Do make sure IP .sip file are included for compilation.

If still got error, modify the test_run_msim_rtl_vhdl.do like below:

Uncommented (#) this line vcom -93 -work work {Z:/test/pll_modelsim/pllreconfig.vho}

Suppress error (vsim-10000): vsim -suppress 10000 -t 1ps -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L cyclonev -L rtl_work -L work -L pllreconfig -L pllreconfig -voptargs="+acc" PLLS_tb

Then execute the modified test_run_msim_rtl_vhdl.do in modelsim.

 

Thanks,

Best Regards,

Sheng

 

Elias97
Novice
2,058 Views

Sorry for the inconvenience, but the solution is not acceptable, since the project would stop being portable, because for the simulation to work I have to modify the .do file so that it correctly routes my folders, do you have any other solution for avoid that problem?

0 Kudos
Elias97
Novice
2,156 Views

 Thank you very much for the help, I managed to solve it. What was the change I made to fix it?

0 Kudos
Reply