I am trying to get a power/energy breakdown of DDR3 and core logic. I used Quartus power analyzer tool to get the power estimates, but I am not sure whether it includes the power consumption of external memory like DDR3, HBM. In general, how do we measure/model the power consumption of the external memory access in Intel FPGA's?
The EPE and the Power Analyzer in Quartus can give estimates of memory controller power usage based on how you've configured the IP and the resources it will use in the device, but it can't estimate external memory power usage. You also mention HBM. If you are referring to the onboard HBM memory in Stratix 10 MX devices, then that can be included in estimates as well. But for anything external to the FPGA, you'd have to check with the memory vendor to see what options they have available and, of course, perform measurements directly on a running board.