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Quartus Prime not showing "input" and "output" as keyword.

Hi all,

I am not able to see "input" and "output" as a keyword for my Verilog code in my Quartus Prime Pro 18.0. Can anyone tell why this is happening and how to resolve this problem ?

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Retired Employee
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I'm not sure I understand. Are you talking about in the Quartus text editor? What are you trying to do that is not working? Does your file have a .v or .sv file extension?

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