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Migrating Intel PSG Cyclone V GX to Agelix F

ericmtzr
New Contributor I
204 Views

Hi,

My customer is Migrating Intel PSG Cyclone V GX to Agelix F and running into the following compilation error:
Error: Design cannot be programmed onto available F-Tiles because given location constraints are conflicting, or because the design requires more resources compared to what is available on current device

Compiler bug? It doesn’t make any difference what Agilex F-tile device I use and I don’t have any location constraints in the qsf file. You will see the compiler attempt to connect the F-Tile to all possible locations and fail.

The Platform designer file you need to check is called cv_pcie_dma_rxtx.qsys
The connections between my DMA and the Pcie isnt right yet but it should compile.

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sstrell
Honored Contributor III
188 Views

An IP in the design may have its own location constraints that prevent placement in the different device.  You usually have to regenerate the IP so it can use the appropriate device resources.  I doubt you can directly bring Cyclone V PCIe directly into an Agilex device.  You'd have to recreate the IP using the IP designed for this device.

wchiah
Employee
177 Views

Hi Ericmtzr,


Thanks sstrell for helping to answer this.

Indeed, The IP design has its own location and pin assignment which place differently each.

I don't think it can be a direct move from Cyclone V to Agilex, my best suggestion will be try to regenerate the new design/IP in Agilex.

You may check on our design store for more IP design as well

https://fpgacloud.intel.com/devstore/


Hope this answer your question, Let me know if further clarification is needed.

Regards,

Wincent_Intel



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wchiah
Employee
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Hi,

 

I wish to follow up with you about this case.

Do you have any further questions on this matter ?

​​​​​​​Else I would like to have your permission to close this forum ticket

 

Regards,

Wincent_Intel


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wchiah
Employee
145 Views

Hi

 

We have not hear from you and this Case is idling. It is not recommended to idle for too long.

Therefore following our support policy, I have to put this case in close status. My apologies if any inconvenience cause

Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

If you feel your support experience was less than a 9 or 10,

please allow me to correct it before closing or let me know the cause so that I may improve your future support experience.

 

Regards,

Wincent_Intel


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