Programmable Devices

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.

Programmable Devices

Discussions

Best demodulation method

Input conduit with clock and Avalon-ST source clock

LP6 PC Card

nco v13.0 megacore problem

Clocking directly vs logic "distortion"

LVDS Rx/Tx Issue

Clock out from GX Transciever

SD Card DE2I150

CYCLONE V OCT Problem

Accessing same memory address from HPS and FPGA

FFT Megacore Frequency Scaling

cross ref for XILINX XC2S600E-6FG456I

Timing requirements to a part of a circuit

AC coupled LVDS clock input - Stratix V

What is the TDP of a Cyclone V chip?

Featured Content

EPM3064ATC44-7N and EPM3064ATI44-10N

Deserializers in Agilex 3 series

Quartus Prime Design Software - JTAG usage

Re: Quartus Prime Design Software - JTAG usage